Senior Digital Logic Engineer - 3D-NAND RTL Architect

Brightecs Innovation Pte. Ltd. is seeking a senior IC design engineer to architect and verify digital control logic for 3D-NAND memory. You will implement RTL encoding in Verilog/SystemVerilog, design FSMs, and ensure JEDEC-compliant interfaces. You will collaborate with FW, analog/mixed-signal, and verification teams, contribute to UVM environments, DFT, FPGA prototyping, and post-silicon debugging to optimize performance and power. J-18808-Ljbffr

Summary and match are AI-generated; verify details on the original posting.

Listed via Adzuna. All sources