Senior/Principal Digital Logic Circuits Engineer for NAND Flash

Responsible for the architecture design, RTL encoding (Verilog/SystemVerilog), and functional verification of digital control logic in 3D-NAND memory ; Design a state machine (FSM) to manage complex NAND operation processes (such as Program, Read, Erase, Copy-back, Suspend/Resume, etc.); Develop a command decoder and address/parameter parsing logic to ensure compliance with JEDEC and internal specifications ; Implement high-precision timing control logic to accurately generate the internal timi…

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